The present invention relates to a semiconductor device, and more specifically, to a method of manufacturing a capacitor using a Carbon Nano Tube (CNT) as a storage node after growing the CNT by using a graphene as a mask.
Generally, semiconductor memory devices store information such as data or a program command.
In such a semiconductor device, a capacitor is used in each circuit of a peripheral circuit region and a cell region. The capacitor is generally constituted with a storage node, a cell plate and a dielectric thin film. In the case of the memory device which includes such a capacitor, it is very important to increase a capacitance of the capacitor.
For securing the capacitance of the capacitor conventionally, a gate oxide film is used as the dielectric thin film in the case of the capacitor used in the circuit, and a cylindrical structure is used in the case of the capacitor used in the cell region.
However, as an integration density of a Dynamic Random Access Memory (DRAM) device is increased to a giga-scale, a size of the capacitor is decreased. Accordingly, in the case of the capacitor used in each circuit, the capacitor can be destroyed due to a low capacitance causing a defect; also, in the case of the capacitor used in the cell region, there is a limit to extending the height of the capacitor.
Also, if the height of the capacitor is increased, manufacturing the capacitor in itself is difficult and there arise many problems in a following photolithography process or a metal process. Consequently, a size of the chip which includes the capacitor needs to be increased. Therefore, the height of the capacitor cannot be increased unlimitedly.
For overcoming the above-mentioned problems, a manufacturing method of the capacitor using a nano tube has been proposed.
However, according to a conventional manufacturing method of the capacitor using the nano tube, nano tubes cannot be vertically grown regularly and uniformly. This causes the nano tubes to get tangled during a growing process.